This invention relates to a semiconductor device in which a semiconductor thin film is formed on a semiconductor substrate through a main insulator.
A semiconductor device of so-called SOI (Silicon on Insulator) structure, in which a single-crystalline or almost single-crystalline semiconductor thin film is formed on a semiconductor substrate through a main insulator, has advantages as mentioned below, when compared with a semiconductor device which is fabricated using only a semiconductor substrate. The electrical isolation is easy with the semiconductor thin film, and p-type and n-type regions can be freely arranged, so that a semiconductor device of complementary circuitry having an excellent electrical performance can be fabricated. In addition, a higher frequency operation is attained owing to small parasitic capacitances. Further, the semiconductor device can be vertically combined with elements formed on the surface of the substrate and can be integrated with a higher packing density.
Examples of the SOT structure are disclosed in U.S. Pat. Nos. 3,484,662 and 3,393, 088.
Such advantages can be even further enhanced by providing a conductive layer. The conductive layer can be used as the gate of an FET (field effect transistor) disposed on the surface of the semiconductor substrate or an FET disposed under the semiconductor thin film, and also as the interconnection between devices.
FIG. 1 is a sectional view showing a prior-art semiconductor device of the SCI structure. In the figure, numeral 1 designates a single-crystalline silicon substrate of the (100) orientation. On the surface of the substrate 1, regions (not shown) the conductivity types and resistivities of which are controlled are formed in desired patterns. Numeral 2 designates a main Insulator which is disposed on the substrate 1, numeral 3 an opening which is provided in the main insulator 2, and numeral 4 a conductive layer which is formed on the main insulator 2 and which has a desired interconnection pattern. Numeral 5 indicates an insulator which covers the conductive layer 4, and numeral 6 a single-crystalline silicon film which is formed on the main insulator 2. In order to form this Si film 6, a polycrystalline silicon layer is deposited and is thereafter recrystallized by, e. g., scanning a laser beam. At this time, the polycrystalline Si layer becomes equal to or higher than the melting point thereof or a temperature close thereto. In order to ensure the electrical insulation between the Si film 6 and the conductive layer 4 made of a refractory metal or polycrystalline Si while such temperature condition is endured, the conductive layer 4 needs to be covered with the insulator 5 which does not react with the conductive layer 4 at this temperature.
Such semiconductor device, however, cannot attain a favorable performance in many cases. An important reason for this is that defects 7 and 8 appear in the parts of the Si film 6 corresponding to the opening 3 and the step of the conductive layer 4 and bring about an increase in the leakage current and a decrease in the mobility.
By the way, in an n-channel MOS-FET in which a channel region is formed in the flat part of the Si film 6, a mobility of at least 600 cm.sup.2 /V.multidot.s is attained in the flat part, whereas a mobility of only about 400 cm.sup.2 /V.multidot.s is attained in the step part. In addition, when the part of the Si film 6 corresponding to the opening 3 is included in a doped region, the defects 7 pose no problem. In contrast, since the part of the Si film 6 corresponding to the conductive layer 4 is often utilized for an active region, the defects 8 are fatal to the fabrication of an integrated circuit of such construction.